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《Chinese Journal of Semiconductors》 1993-01
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High Speed Pipelined Multiplier Using a Modified Domino Adder

Wang Yueming/Institute of Microelectronics, Tsinghua University, Beijing 100084Xu Jiasheng/Institute of Microelectronics, Tsinghua University, Beijing 100084  
Multiplier is the key in the Digital Signal Processing System. Pipelined Multiplier canachieve high speed with lower cost. In this paper, the structure of pipelined multiplier is given;two new modified Domino adders are proposed;the circuits are analysed and simulatedwith SPICE.The results show that the speed of the pipelined multiplier has been improvedsignificantly when the modified Domino adders are adopted.
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