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VEAP: Efficient VLSI Placement Algorithm Based on Global Optimization

Kong Tianming;Hong Xianlong and Qiao Changge(Dept. of Computer Set. & Tech., Tsinghua University, Beijing 100084)Received 22 July 1996, revised manuscript received 18 November 1996  
For regular ICs, a novel VLSI placement algorithm is presented. The algorithm is based on strict mathematical analysis, can provably find the global optima. And the algorithm's requirements for system resource are rather low. Experimental results are very promising. For a test circuit avq with scale large up to 21000 cells, our algorithm is faster than any existing algorithms. Another point is that our algorithm is suitable for timing driven placement.
【Fund】: 国家攻关经费基金;;高等学校博士学科点专项科研基金
【CateGory Index】: TN405
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2 Zhang Yiqian,Xie Min,Hong Xianlong and Cai Yici(Department of Computer Science and Technology,Tsinghua University,Beijing 100084,China);Cross Point Assignment Algorithm Under Consideration of Very Long Nets[J];Chinese Journal of Semiconductors;2002-06
3 Yang Zhong 1,2,Dong Sheqin 1,Hong Xianlong 1 and Wu Youliang 3[KH2D](1 Department of Computer Science and Technology,Tsinghua University,Beijing 100084,China) (2 Graduate School at Shenzhen,Tsinghua University,Shenzhen 518057,China) (3 Department of Computer Science and Engineering,The Chinese University of Hong Kong,China);Arbitrary Rectilinear Block Packing Based on Less Flexibility First Principles[J];Chinese Journal of Semiconductors;2004-11
4 WU Wei-min1,HONG Xian-long1,CAI Yi-ci1,GU Jun2 (1Dept.of Computer Science & Technology,Tsinghua University,Beijing 100084,China; 2Dept.of Computer Science,The HongKong University of Science & Technology,HongKong,China);High Efficiency Clustering Algorithm for Standard Cell Placement[J];Acta Electronica Sinica;2001-02
5 JIANG Xian yang,SHEN Xu bang,ZHANG Tian xu (Key Laboratory of Image Processing & Intelligent Control, Ministry of Education;Institute of Pattern Recognition & Artificial Intelligence, Huazhong Univ. Sci. & Technol., Wuhan, Hubei 430074, P.R.China);An Overview on the Design of Communication Specific IC's[J];Microelectronics;2001-05
Chinese Journal Full-text Database 10 Hits
1 Ying Changsheng/Dept. of Computer Science & Technology,Tsinghua University, BeijingHong Xianlong/Dept. of Computer Science & Technology,Tsinghua University, BeijingWang Erqian/Dept. of Computer Science & Technology,Tsinghua University, Beijing;DRAFT——An Efficient Area Router Based on Global Analysis[J];Chinese Journal of Semiconductors;1988-06
2 Chen Chunhong and Tang Pushan(Department of Electronic Engineering, Fudan University, Shanghai 200433);Interconnection Delay and Its Approximation for IC Layout Design[J];CHINESE JOURNAL OF SEMICONDUCTORS;1997-07
3 Li Jiang; Hong Xianlong; Qiao Changge and Cai Yici(Department of Computer Science and Technology, Tsinghua University, Beijing 100084);Cross Point Assignment Algorithm Based on Analysis of Net Type[J];CHINESE JOURNAL OF SEMICONDUCTORS;1997-08
4 Zhou Feng, Tong Jiarong, Tang Pushan(CAD Institute, Electronic Engineering Department, Fudan University, Shanghai\ 200433);Routing Algorithm for FPGA With Time Constraints[J];CHINESE JOURNAL OF SEMICONDUCTORS;1999-09
5 DING Bao\|yan and ZHANG Qian\|ling(ASIC and System State\|Key Laboratory,Fudan University,Shanghai\ 200433, China)Received 9 February 1999, revised manuscript received 1 July 1999;Design of Constant Divider and Its BIST Implement[J];CHINESE JOURNAL OF SEMICONDUCTORS;2000-05
6 YAO Bo, HOU Wen\|ting, HONG Xian\|longand CAI Yi\|ci)(Department of Computer Science and Technology, Tsinghua University, Beijing\ 100084, China);Fame:A Fast Detailed Placement Algorithm for Standard\| Cell Layout Based on Mixed Mincut and Enumeration[J];CHINESE JOURNAL OF SEMICONDUCTORS;2000-08
7 LI Chun\|hui, FAN Ming\|yu, ZHUANG Chang\|wen and YU Jue\|bang(The University of Electronic Science and Technology of China, Chengdu\ 610054, China)HUANG Jin(Ambow Corp., 2701 North Western Parkway, Santa Clara, CA 95051, USA)Received 26 April 1999, revi;Optimum Design of Power and Ground Topology Subject to Reliability and Noise Constraints[J];CHINESE JOURNAL OF SEMICONDUCTORS;2000-08
8 YU Hong,YAO Bo,HONG Xian- long and CAI Yi- ci ( Departmentof Computer Science and Technology,Tsinghua University,Beijing 10 0 0 84,China);ECOP:A Row- Partition Based Incremental Placement Algorithm for Standard Cell Layout Design[J];Chinese Journal of Semiconductors;2001-01
9 Wang Xiaogang,Yao Linsheng and Gan Junren(CAD Center,Shanghai Institute of Metallurgy,The Chinese Academy of Sciences,Shanghai 200050,China);VLSI Floorplanning Method Based on Genetic Algorithms[J];Chinese Journal of Semiconductors;2002-03
10 Wang Nailong,Dai Hongyu and Zhou RundeProject supported by National Natural Science Foundation of China (No.59995550 1) Wang Nailong male,was born in 1977,PhD candidate.His research interests are low power CMOS circuit design and electrothermal simulation. Dai Hongyu male,was born in 1975,PhD candidate.His research interests are low power CMOS circuit design and embedded system design. Zhou Runde male,was born in 1945,professor and advisor for PhD candidates.His research interests are low power IC design and embedded system structure. Received 1 June 2002,revised manuscript received 4 November 2002○c 2003 The Chinese Institute of Electronics(Institute of Microelectronics,Tsinghua University,Beijing 100084,China);VLSI Thermal Placement Optimization Using Simulated Annealing[J];Chinese Journal of Semiconductors;2003-04
【Secondary References】
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1 FAN Hai-qiu,CAO Li-cheng,XIE Guang-jun(School of Sciences,Hefei University of Technology,Hefei 230009,China);Algorithms for VLSI placement[J];Journal of Hefei University of Technology(Natural Science);2005-12
2 WANG Guoping,ZHOU Duan(College of Computer,Xidian University,Xi'an Shanxi 710071,China);An Overview on the Design of Microcontroller IP Soft Core with High Performance and Low Consume[J];Application Research of Computers;2003-02
3 LIU Bao-juan,GENG Shuang(The 47th Research Institute of China Electronics Technology Group Corporation,Shenyang 110032,China);A Algorithm for Placement of RAM and Standard Cell Designs[J];Microprocessors;2007-05
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