Full-Text Search:
Home|Journal Papers|About CNKI|User Service|FAQ|Contact Us|中文
《Chinese Journal of Semiconductors》 2003-04
Add to Favorite Get Latest Update

VLSI Thermal Placement Optimization Using Simulated Annealing

Wang Nailong,Dai Hongyu and Zhou RundeProject supported by National Natural Science Foundation of China (No.59995550 1) Wang Nailong male,was born in 1977,PhD candidate.His research interests are low power CMOS circuit design and electrothermal simulation. Dai Hongyu male,was born in 1975,PhD candidate.His research interests are low power CMOS circuit design and embedded system design. Zhou Runde male,was born in 1945,professor and advisor for PhD candidates.His research interests are low power IC design and embedded system structure. Received 1 June 2002,revised manuscript received 4 November 2002○c 2003 The Chinese Institute of Electronics(Institute of Microelectronics,Tsinghua University,Beijing 100084,China)  
A placement scheme that considers both electrical performance requirements and thermal behavior for high performance VLSI chips is described.It is aimed at improving the substrate thermal distribution of a chip design without worsening the traditional design objects such as critical path delay and wire length very much.A useful placement method is developed using simulated annealing algorithm to optimize chip substrate thermal distribution.The simulation results show satisfied improvements of thermal distribution over the traditional placement algorithm with bearable increases of less than 4% in delay and total wire length of the final layout.
【Fund】: 国家自然科学基金资助项目 (批准号 :5 9995 5 5 0 -1)~~
【CateGory Index】: TN405
Download(CAJ format) Download(PDF format)
CAJViewer7.0 supports all the CNKI file formats; AdobeReader only supports the PDF format.
Chinese Journal Full-text Database 4 Hits
1 Wang Nailong and Zhou Runde(Institute of Microelectronics,Tsinghua University,Beijing 100084,China);A Novel Analytical Thermal Model for Temperature Estimation of Multilevel ULSI Interconnects[J];Chinese Journal of Semiconductors;2004-11
2 Xu Zheng 1,2 Yoshimura Takeshi2(1.School of Communication and Information Engineering,Shanghai University,Shanghai 200072;2.Graduate School of Information,Production and Systems,Waseda University,Kitakyusyu Japan);Multilevel floorplanning sesign for large-scale integrated circuits[J];Electronic Measurement Technology;2009-05
3 Wen Dongxin,Yang Xiaozong,and Wang Ling(School of Computer Science and Technology,Harbin Institute of Technology,Harbin 150001);A High Level Synthesis Scheme and Its Realization for Low Power Design in VLSI[J];Journal of Computer Research and Development;2007-07
4 WANG Yu-lan YUN He-ming;Optimized Analysis of Heat Dissipation Distribution of Electronic Elements for PCB Based on Simulated Annealing[J];Information Technology and Informatization;2007-01
Chinese Journal Full-text Database 1 Hits
1 Kong Tianming, Hong Xianlong and Qiao Changge(Department of Computer Science and Technology, Tsinghua University, Beijing\ 100084);POTIF: Efficient Power and Timing Driven Placement Algorithm[J];CHINESE JOURNAL OF SEMICONDUCTORS;1998-01
Chinese Journal Full-text Database 3 Hits
1 Zhang Yiqian,Xie Min,Hong Xianlong and Cai Yici(Department of Computer Science and Technology,Tsinghua University,Beijing 100084,China);Cross Point Assignment Algorithm Under Consideration of Very Long Nets[J];Chinese Journal of Semiconductors;2002-06
2 JIANG Xian yang,SHEN Xu bang,ZHANG Tian xu (Key Laboratory of Image Processing & Intelligent Control, Ministry of Education;Institute of Pattern Recognition & Artificial Intelligence, Huazhong Univ. Sci. & Technol., Wuhan, Hubei 430074, P.R.China);An Overview on the Design of Communication Specific IC's[J];Microelectronics;2001-05
3 YU Hong, HONG Xianlong, QIAO Changge, CAI Yici Department of Computer Science and Technology, Tsinghua University, Beijing 100084, China;Tree based design approach for power/ground network[J];JOURNAL OF TSINGHUA UNIVERSITY(SCIENCE AND TECHNOLOGY);1998-S1
Chinese Journal Full-text Database 10 Hits
1 FU Gui-cui,GAO Ze-xi,ZOU Hang,WANG Dan-yan(Dept. of Systems Engineering, Beijing University of Aeronautics and Astronautics, Beijing 100083, China);Thermal design of power component and optimal design of heat sink[J];Semiconductor Technology;2004-05
2 Kong Tianming;Hong Xianlong and Qiao Changge(Dept. of Computer Set. & Tech., Tsinghua University, Beijing 100084)Received 22 July 1996, revised manuscript received 18 November 1996;VEAP: Efficient VLSI Placement Algorithm Based on Global Optimization[J];CHINESE JOURNAL OF SEMICONDUCTORS;1997-09
3 Zhu Zhangming,Qian Libo,and Yang Yintang(Institute of Microelectronics,Xidian University,Xi'an 710071,China);A Novel Interconnect Crosstalk Parallel RLC Analyzable Model Based on the 65nm CMOS Process[J];Journal of Semiconductors;2008-03
4 Wang Shiping; Luan Yongwei and Zhao Dunshu(Xidian University, Xi'an 710071 )Received 11 December 1994, revised manuscript received 15 August 1995;Thermal Analysis of High Density Packages[J];CHINESE JOURNAL OF SEMICONDUCTORS;1996-05
5 Kong Tianming, Hong Xianlong and Qiao Changge(Department of Computer Science and Technology, Tsinghua University, Beijing\ 100084);POTIF: Efficient Power and Timing Driven Placement Algorithm[J];CHINESE JOURNAL OF SEMICONDUCTORS;1998-01
6 WANG Hongwei 1)LU Junlin TONG Dong CHENG Xu(Microprocessor Research & Development Center,Peking University,Beijing,100871; 1));Hierarchical Network-on-Chip Design Method[J];Acta Scientiarum Naturalium Universitatis Pekinensis;2007-01
7 Dai Ruwei (AI Lab of Institute of Automation, chinese Academy of Science Beijing, 100080, Beijing, China);Metasyntactic Wisdom of Man Computer Cooperation[J];Journal of North China University of Technology;1996-03
8 LU Yi ping, CHA Jian zhong, LI Jian yong,E Ming cheng (College of Mechanical and Electrical Engineering, Northern Jiaotong University, Beijing 100044,China);Pattern Generation and Solution of Layout Problem Based on Neighboring Minimum Searching[J];JOURNAL OF NORTHERN JIAOTONG UNIVERSITY;2000-04
9 TANG Xiao_jun, ZHA Jian_zhong, LU Yi_ping(School of Mechanical and Electronic Control Engineering,Northern Jiaotong University, Beijing 100044,China);Modeling Method of Packing Problems[J];Journal of Northern Jiaotong University;2003-01
10 ZHOU Shi-guan, LI Zhong-xia (College of Electromechanical Engineering, Southern Institute of Metallurgy, Ganzhou 341000, China);Genetic Algorithm for Optimization of Neural Network Structure and Weight Distribution[J];Ordnance Industry Automation;2004-04
【Secondary References】
Chinese Journal Full-text Database 5 Hits
1 HE Xu-shu,HUANG He,PEI Song-wei,BAO Su-su(School of Computer,South China Normal University,Guangzhou 510631,China);THERMAL ANALYSIS OF MULTILEVEL METAL ROUTING IN 0.1 μm ULSI TECHNOLOGY[J];Journal of South China Normal University(Natural Science Edition);2006-03
2 PEI Song-wei,HUANG He,HE Xu-shu,BAO Su-su(School of Computer,South China Normal University,Guangzhou,Guangdong 510631,P.R.China);Effects of Via on Temperature Distribution of Metal Wires[J];Microelectronics;2006-04
3 LIU Yan,BAI Yan,LI Jing(Institute of Information Engineering,PLA Information Engineering University,Zhengzhou 450002,China);Research of dispersed waveform and adventure in logic simulation[J];Computer Engineering and Design;2008-01
4 PEI Song-wei, HUANG He, HE Xu-shu, BAO Su-su (School of Computer, South China Normal University, Guangzhou 510631, China);Analysis of Hot Spots in ULSI Interconnect and Via Systems[J];Microelectronics & Computer;2007-04
5 SUN Qiang1,2,SUN Xing-qi3,MA Guang-sheng1(1.Dept.of Computer Science and Tech.,Harbin Eng.Univ.,Harbin 150001,China;2.Dept.of Computer Science and Tech.,Mudanjiang Teachers College,Mudanjiang 157012,China;3.The Second Artillery Qinzhou Warrant Officer School,Qingzhou 262500,China);High-level power optimization method for multiple supply voltage using the multi-objective genetic algorithm[J];Journal of Xidian University;2009-05
©2006 Tsinghua Tongfang Knowledge Network Technology Co., Ltd.(Beijing)(TTKN) All rights reserved