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《Chinese Journal of Semiconductors》 2004-11
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A Novel Analytical Thermal Model for Temperature Estimation of Multilevel ULSI Interconnects

Wang Nailong and Zhou Runde(Institute of Microelectronics,Tsinghua University,Beijing 100084,China)  
A novel analytical thermal model for estimating the temperature rise of multilevel ULSI interconnects is presented,and the impact of joule heating,via effect,and heat fringing effect is investigated in details.After considering the via effect and heat fringing effect of multilevel ULSI interconnects,LTem provides more accurate temperature estimation of the multilevel interconnects.
【Fund】: 国家自然科学基金资助项目 (批准号 :5 9995 5 5 0 -1)~~
【CateGory Index】: TN432
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【References】
Chinese Journal Full-text Database 3 Hits
1 HE Xu-shu,HUANG He,PEI Song-wei,BAO Su-su(School of Computer,South China Normal University,Guangzhou 510631,China);THERMAL ANALYSIS OF MULTILEVEL METAL ROUTING IN 0.1 μm ULSI TECHNOLOGY[J];Journal of South China Normal University(Natural Science Edition);2006-03
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【Citations】
Chinese Journal Full-text Database 1 Hits
1 Wang Nailong,Dai Hongyu and Zhou RundeProject supported by National Natural Science Foundation of China (No.59995550 1) Wang Nailong male,was born in 1977,PhD candidate.His research interests are low power CMOS circuit design and electrothermal simulation. Dai Hongyu male,was born in 1975,PhD candidate.His research interests are low power CMOS circuit design and embedded system design. Zhou Runde male,was born in 1945,professor and advisor for PhD candidates.His research interests are low power IC design and embedded system structure. Received 1 June 2002,revised manuscript received 4 November 2002○c 2003 The Chinese Institute of Electronics(Institute of Microelectronics,Tsinghua University,Beijing 100084,China);VLSI Thermal Placement Optimization Using Simulated Annealing[J];Chinese Journal of Semiconductors;2003-04
【Co-citations】
Chinese Journal Full-text Database 3 Hits
1 Xu Zheng 1,2 Yoshimura Takeshi2(1.School of Communication and Information Engineering,Shanghai University,Shanghai 200072;2.Graduate School of Information,Production and Systems,Waseda University,Kitakyusyu Japan);Multilevel floorplanning sesign for large-scale integrated circuits[J];Electronic Measurement Technology;2009-05
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3 WANG Yu-lan YUN He-ming;Optimized Analysis of Heat Dissipation Distribution of Electronic Elements for PCB Based on Simulated Annealing[J];Information Technology and Informatization;2007-01
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1 LIANG Jing, HUANG Rong\|xu\+1, ZHENG Guo\|xiang, LIN Jian\+1, PANG Hai\|zhou\+1 and ZONG Xiang\|fu(Department of Materials Science, Fudan University,Shanghai\ 200433, China) (1\ Advanced Semiconductor Manufacturing Corp.,Shanghai\ 200233, China)Receiv;Technological Investigation of Contact Hole Filling and Aluminum Metallization Process in Sub\|Micron IC Devices[J];CHINESE JOURNAL OF SEMICONDUCTORS;2000-06
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【Secondary Citations】
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1 Kong Tianming, Hong Xianlong and Qiao Changge(Department of Computer Science and Technology, Tsinghua University, Beijing\ 100084);POTIF: Efficient Power and Timing Driven Placement Algorithm[J];CHINESE JOURNAL OF SEMICONDUCTORS;1998-01
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