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《Journal of Beijing University of Technology》 2008-10
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Method to Reduce the Complexity of MIMO Receiver in B3G System

WANG Qiang TAO Xiao-feng XU Ling-jun SHU Jing ZHANG Ping (Wireless Technology Innovation Institute,Beijing University of Posts and Telecommunications,Beijing 100876,China)  
To reduce the resources of MIMO receiver during FPGA implement,this paper simplifies the V- BLAST (Vertical Bell lab Layered Spaced-Time) detection algorithm,applies bit-width reduction technique to save resources,and uses fixed point logic to keep the performance.Simulation shows that the BER (Bit Error Rate) performance is close to Golden detection algorithm,but the complexity is greatly less.Statistics on resource occupation of such schemes in VertexⅡ-Pro Series FPGA of Xilinx Company was given,while the schemes were verified on B3G TDD system hardware platform.The result shows that the simplified implementation schemes are applicable to hardware implementation of B3G TDD system MIMO receiver.
【Fund】: 国家自然科学基金重大项目(60496312);; 国家“八六三”计划资助项目(2006AA01Z260).
【CateGory Index】: TN919.3
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