Fault Diagnosis Based on Temporal Logic Technology in HV Transmission System
YUE Quan-min, DONG Zhi-yun, ZHENG Hua-zhen, YU Wei-yong, ZHANG Pei-chao, WANG Zhong-min, ZHANG Qi-ming (Shanghai Jiaotong University, Shanghai 200240, China)
A new idea is presented to introduce the linear temporal logic (LTL) technology and analog information into a fault diagnosis system for high voltage (HV) transmission lines. A linear temporal logic formal deduction system is expressed with a complete syntax and semantic interpreting system. The fault analog signal is preprocessed in a substation by considering the need for system fault tolerance and real-time requirement of fault diagnosis. In the dispatcher center, the time sequence of protection and breaker actions in the fault diagnosing process is analyzed. Then the TDS and TAS about a typical fault mode are formed and the time sequence restriction relation is expressed by LTL. The reliability and tolerance of reasoning is verified with a practical example.