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《Journal of North China Institute of Astronautic Engineer》 2001-02
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High Performance Signal Processor ADSP21060 and its Application

Li ZhaohuiElectronics Engineering Department, North China Institute of Astronautic Engineering  
Abstract The ADSP21060 SHARC桽uper Harvard Architecture Computei梚s a 32 -bit floating- point computation processor optimized for high- speed performance. There are four independent buses for dual data fetch, instruction fetch and nonintrusive I/O adding an dual - ported on - chip SRAM and 32 - bit floating - point operation unit. The multiprocessing DSP systems are very fit for rada - r signal processing. Now we take the radar signal processor as an example to introduce the application of ADSP21060 in this paper.
【CateGory Index】: TP332
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