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《Computer Engineering》 2011-23
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Optimized Algorithm for Hardware Implementation Based on SVM Probability Modeling

YANG Zhen-xi,ZHANG Li,NIE Zhi-liang(National Digital Switch System Engineering & Technological R & D Center,Zhengzhou 450002,China)  
For the unsuitable Field Programmable Gate Array(FPGA) implementation of the Pairwise Coupling probability modeling and the poor classification performance of the voting probability modeling which are the two commonly used Support Vector Machine(SVM) probability modeling algorithms based on One Against One(OAO) classification strategy,an optimized algorithm for hardware implementation of probability modeling SVM is proposed which is based on Sigmoid function and Log-add with combined computation is proposed from the point of compromise.The theoretical analysis shows that this algorithm avoids complex iterative calculation and a large number of exponential calculations.It greatly reduces the amount of computation and is easy for FPGA implementation.
【Fund】: 国家“863”计划基金资助项目(2008AA011002)
【CateGory Index】: TP301.6
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