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《Journal of Computer Aided Design & Computer Graphics》 2004-11
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Multi-way Hardware-Software Partitioning Algorithm Based on Abstract Architecture Template

Wu Qiang Bian Jinian Xue Hongxi (Department of Computer Science and Technology, Tsinghua University, Beijing 100084) Abstract With the wide application of System-on-Chip in embedded system design, the hardware-software partitioning turns from a traditional bipartition problem to a multi-way partitioning problem To deal with this issue, an  
template of the processing element network connecting with communication channels is proposed for modeling multiple processing module architecture Simulated annealing and heuristic scheduling algorithms are employed to determine the multi-way hardware-software partition and estimate the system performance and cost respectively Preliminary experiments show that the proposed algorithm can make reasonable choice among different architectures for the optimization of system performance and cost
【Fund】: 国家自然科学基金 ( 90 2 0 70 17);; 国家重点基础研究发展规划项目 (G19980 3 0 40 3 );; 国家“八六三”高技术研究发展计划 ( 2 0 0 3AA115 110 )资助
【CateGory Index】: TP311.1
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