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《Science & Technology Information》 2011-29
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SDRAM-Based Design and Implementation of Network Delayer

Datas transmit through different types of communication systems,due to the differences of data transmission links,the datas got to receiver at different times.The design of network delayer resolve this problem,the network delayer insert a delay before the datas transmission faster to make the datas from different networks arrive at the same time,avoid the distortion caused by the datas arriving at different times.
【CateGory Index】: TP393.05
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【Citations】
Chinese Journal Full-text Database 2 Hits
1 Gao Ziwang Gu Meikang(Department of Information and Electronic Engineering,Shanghai Normal University,Shanghai 200234);FPGA-Based Low Complexity Implementation Method of SDRAM Controller[J];Computer & Digital Engineering;2010-01
2 Zhao Chuanmeng1) Gao Yan1) Zhang Rong2)(School of Automation,Beijing Institute of Technology1),Beijing 100081)(Beijing Commanding College of CAPF2),Beijing 100012);A Simple Design and Implementation of SDRAM Controller[J];Computer & Digital Engineering;2010-08
【Co-citations】
Chinese Journal Full-text Database 2 Hits
1 LIU Yan-fei,YANG Tie-qian,LI Qi,NI Liang(The Second Artillery Engineering College,Xi′an 710025,China);Design of Double SDRAM Controller for Multibus Ground-based Test Equipment[J];Telecommunication Engineering;2011-04
2 Teng Minghui,Yang Ruifeng(college of signal and communication Engineering in north china of university 3 College Road,Taiyuan,Shanxi 030051);Implementation of high speed and deep asynchrous FIFO based on FPGA[J];Electronic Test;2010-09
【Secondary Citations】
Chinese Journal Full-text Database 10 Hits
1 CHENG Li, WANG Zhen-yu, GAO Ping(Institute of Electricity & Information, Jiangsu University, Zhenjiang 212013, China);Latest progresses and developments of DRAM fabrication[J];Semiconductor Technology;2004-04
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4 ZHANG Lin and HE Chun (Research Institute of Electronic Science and Technology, University of Electronic of Science and Technology of china Chengdu 610054);FPGA Implementation of High Speed SDRAM Controller[J];Journal of University of Electronic Science and Technology of China;2008-S1
5 LIU Gang~1,XIANG Jian-yong~2(1.Shandong University of Technology,Zibo 255049,China;2.Xidian University,Xi'an 710071,China);A High-speed Image Data Acquisition System[J];Electronic Engineer;2006-05
6 Yang Huiwei~1 Wang Wei~1 Yang Huiling~2 Liu Junjie~1 (1.School of Optoelectronic Engineering,Xi'an Technological University,Xi'an 710032;2.Changchum University of Science and Technology,Changchun 130022);High speed CMOS camera image acquisition system key technologies research[J];Foreign Electronic Measurement Technology;2008-10
7 LI Cheng-wen(Aeronautical Computing Technique Research Institute,Xi′an 710068,China);A SDRAM Controller Designed by VHDL and its Application[J];Aeronautical Computing Technique;2007-05
8 XU Wen-bo~1,HU Dan~(1,2)(1.School of Information Technology,Southern Yangtze University,Wuxi 214122,China;2.Institute of Computing Technology,Chinese Academy of Sciences,Beijing 100080,China);Implementation of DDR2 SDRAM Controller in a FPGA[J];Journal of Southern Yangtze University;2006-02
9 Duan Ran Fan Xiaoya Zhang Shengbing Shen Ge Liang Jie (Computer College,Northwestern Polytechnical University,Xi'an 710072);Design and Implementation of a FSM-based SDRAM Controller[J];Computer Engineering and Applications;2005-17
10 MENG Xianhai; LI Xi; LU Lan; ZHOU Xuehai; ZHAO Zhenxi; (Bengbu Tank College, Bengbu 233013; Dept. of Computer Science, Unly. of Sci. & Tech. of China, Hefei 230027);Study on Technology of Error Control of Memory Controller[J];COMPUTER ENGINEERING;2000-08
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