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《Microelectronics》 2004-06
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Implementation of a Decimation Filter for Oversampling Σ-Δ A/D Converters

LI Hua, LI Dong-mei, LI Fu-le, WANG Zhi-hua(Dept. Electronic Engineering, Tsinghua University, Beijing 100084, P. R. China)  
A decimation filter for oversampling Σ-Δ A/D converter is implemented in 0.8 μm CMOS process. In this filter, a multi-stage structure is adopted, with a comb filter as the first-stage filter and an FIR low-pass filter as the last-stage filter, which is designed with the best equal-ripple uniform approximation algorithm. The bit-serial algorithm is used for its VLSI implementation. By processing the bit stream from a 2-level Σ-Δ modulator with an oversampling ratio of 128, a signal-to-noise ratio of 75 dB is obtained for the filter.
【Fund】: 国家高技术(863)SOC片上系统重大专项项目(2002AA1Z1720);; 国家重大基础研究(973)项目(G2000036508)
【CateGory Index】: TN792
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【Co-citations】
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【Co-references】
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【Secondary References】
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