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《Computer Technology and Development》 2012-10
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Design of a High-speed ZBT SRAM Controller

YAO Zhi-wen(China Airborne Missile Academy,Luoyang 471009,China)  
FPGA has been widely used in radar domains.However,FPGA internal memory storages are often insufficient for system requirement.Therefore external memory becomes necessary.In this paper,2 high-performance ZBT SRAMs were chosen as Pingpong buffer for FPGA,maximum access frequency attains 133MHz.And the total storages achieve 32Mbits,which is adequate for designed aim.Because of ZBT SRAM's special access timing,FPGA clock management modules have to be adopted to modify clock frequency and phase.Furthermore,to control FPGA I/O pad delay characteristic,advanced timing assignment tools were employed.So that designed ZBT SRAM controller can complete mass data exchanges between ZBT SRAM and FPGA internal module.Whole system was realized via synthesizable VHDL code,and implemented on Xilinx Virtex4 FPGA.Currently this design has been successfully used in certain radar missile signal processor,indicating its validity was verified.
【Fund】: 航空科学基金项目(20090180001)
【CateGory Index】: TN957.51;TP333
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