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《Microelectronics & Computer》 2007-04
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Analysis of Hot Spots in ULSI Interconnect and Via Systems

PEI Song-wei, HUANG He, HE Xu-shu, BAO Su-su (School of Computer, South China Normal University, Guangzhou 510631, China)  
Hot spot is one of the most important factors to the performance and reliability of ULSI。An analytical thermal model for estimating the positions and temperatures of hot spot in interconnect and via systems is presented, and comparing the positions and temperatures of hot spots in different via diameters and via heights in the paper. It has been shown that via diameter and via height have important effects on the hot spot of interconnect and via systems.
【Fund】： 国家自然科学基金项目(60076013)
【CateGory Index】： TN47
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【Citations】
Chinese Journal Full-text Database 3 Hits
1 Wang Nailong and Zhou Runde(Institute of Microelectronics,Tsinghua University,Beijing 100084,China);A Novel Analytical Thermal Model for Temperature Estimation of Multilevel ULSI Interconnects[J];Chinese Journal of Semiconductors;2004-11
2 LI Zhi-guo,LU Zhen-jun (The School of Electronics and Control Engineering,Beijing Polytechnic University,Beijing 100022,China);Numerical Simulation of Electric and Thermal Characteristic in ULSI Copper-Filled Inteconnect Via Hole[J];Acta Electronica Sinica;2003-07
3 LIU Ying, WENG Jian-jie, RONG Meng-tian(Dept. of Electronic Eng., Shanghai Jiaotong Univ, Shanghai 200030 China);Optimizate VLSI Wire by Modified Active Set Method[J];Microelectronics & Computer;2004-12
【Co-citations】
Chinese Journal Full-text Database 3 Hits
1 HE Xu-shu,HUANG He,PEI Song-wei,BAO Su-su(School of Computer,South China Normal University,Guangzhou 510631,China);THERMAL ANALYSIS OF MULTILEVEL METAL ROUTING IN 0.1 μm ULSI TECHNOLOGY[J];Journal of South China Normal University(Natural Science Edition);2006-03
2 PEI Song-wei,HUANG He,HE Xu-shu,BAO Su-su(School of Computer,South China Normal University,Guangzhou,Guangdong 510631,P.R.China);Effects of Via on Temperature Distribution of Metal Wires[J];Microelectronics;2006-04
3 YU Xue-hong(School of Microelectronics,Shanghai Jiaotong University,Shanghai 200240,China);Statistical Interconnect Timing Models Using Symbolic Moments[J];Microelectronics & Computer;2009-07
【Co-references】
Chinese Journal Full-text Database 7 Hits
1 RUAN Gang 1 and XIAO Xia 2 (1 ASIC and System State Key Laboratory,Fudan University,Shanghai 200433,China) (2 Center of Microtechnology,Technical University of Chemnitz,Chemnitz D-09107 ,Germany);Simulation of Thermal Performance of ULSI Inte rconnect System[J];Chinese Journal of Semiconductors;2001-08
2 Xiao Xia~ 1, ,Yao Suying~1,and Ruan Gang~2(1 Center of ASIC,School of Electronic and Information Engineering,Tianjin University,Tianjin 300072,China)(2 School of Information Science and Engineering,Fudan University,Shanghai 200433,China);Influence of Interconnection Configuration on Thermal Dissipation of ULSI Interconnect Systems[J];Chinese Journal of Semiconductors;2006-03
3 LI Zhi-guo,LU Zhen-jun (The School of Electronics and Control Engineering,Beijing Polytechnic University,Beijing 100022,China);Numerical Simulation of Electric and Thermal Characteristic in ULSI Copper-Filled Inteconnect Via Hole[J];Acta Electronica Sinica;2003-07
4 HE Xu-shu,HUANG He,PEI Song-wei,BAO Su-su(School of Computer,South China Normal University,Guangzhou 510631,China);THERMAL ANALYSIS OF MULTILEVEL METAL ROUTING IN 0.1 μm ULSI TECHNOLOGY[J];Journal of South China Normal University(Natural Science Edition);2006-03
5 PEI Song-wei,HUANG He,HE Xu-shu,BAO Su-su(School of Computer,South China Normal University,Guangzhou,Guangdong 510631,P.R.China);Effects of Via on Temperature Distribution of Metal Wires[J];Microelectronics;2006-04
6 XU Xiao-cheng (Shanghai Huahong Group Co.,Ltd., Shanghai 200020,China);On the Interconnecting Technology of Metal Copper Used in IC with Deep Sub-micron Processing[J];Microelectronic Technology;2001-06
7 HAO Yue~1,SHAO Bo-tao~1,MA Xiao-hua~1,HAN Xiao-liang~1,WANG Jian-ping~2(1. Research Inst. of Microelectronics, Xidian Univ., Xi′an 710071, China; 2. SMIC, Shanghai 201203, China);State of the arts Cu interconnect and its reliability in ULSI[J];Journal of Xidian University;2005-04
【Secondary Citations】
Chinese Journal Full-text Database 1 Hits
1 Wang Nailong,Dai Hongyu and Zhou RundeProject supported by National Natural Science Foundation of China (No.59995550 1) Wang Nailong male,was born in 1977,PhD candidate.His research interests are low power CMOS circuit design and electrothermal simulation. Dai Hongyu male,was born in 1975,PhD candidate.His research interests are low power CMOS circuit design and embedded system design. Zhou Runde male,was born in 1945,professor and advisor for PhD candidates.His research interests are low power IC design and embedded system structure. Received 1 June 2002,revised manuscript received 4 November 2002○c 2003 The Chinese Institute of Electronics(Institute of Microelectronics,Tsinghua University,Beijing 100084,China);VLSI Thermal Placement Optimization Using Simulated Annealing[J];Chinese Journal of Semiconductors;2003-04
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