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《Chinese Journal of Sensors and Actuators》 2012-01
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FPGA Implementation of High Speed Parallel Correction for Sensor ' s Dynamic Error

WU Jian,ZHANG Zhijie,WANG Wenlian(National Defense Key Laboratory of Electronic Measurement Technology,North University of China,Taiyuan 030051,China)  
In order to correct the error caused by dynamic characteristics of sensor using dynamic compensator,a design method of dynamic compensator based on improved particle swarm optimization(PSO)algorithm is presented.With this method,the parameters of the compensator avoid the influence of PSO algorithm ' s initial conditions.To realize real-time correction for sensor ' s dynamic error,the high speed parallel structure of optimized compensator is designed by using the distributed arithmetic and it is realized in FPGA chip.The experimental results show that the high speed parallel compensator does not only correct sensor ' s dynamic error,but also cut down the consumption of hardware resources greatly and improve the sampling rate of system effectively.
【Fund】: 山西省自然科学基金资助项目(2009011023);; 山西省青年科技研究基金资助项目(2010021015-3)
【CateGory Index】: TP212.6
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