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Implementation of Interpolation Timing Recovery Algorithm Based on FPGA

TIAN Kechun;XU Yan;Guilin University of Electronic Technology;  
A method based on FPGA for implementing timing recover algorithm is presented. The principles of the interpolation filter,timing error detector,loop filter and controller are analyzed. Through simulations on the Simulink plantform,the work procedures of various modules are understood and mastered. The four modules are also designed on the FPGA plantform. Simulations are conducted on the Quartus Ⅱ 9. 1 platform.
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