Full-Text Search:
Home|Journal Papers|About CNKI|User Service|FAQ|Contact Us|中文
《Journal of Fudan University(Natural Science)》 2018-02
Add to Favorite Get Latest Update

Design and Implementation of a FPGA-based Accelerator for Convolutional Neural Networks

ZHANG Bang;LAI Jinmei;State Key Laboratory of ASIC & Systems,Fudan University;  
In this paper,a convolutional neural network(CNN)acceleration method based on field programmable gate array(FPGA)is proposed,which aims to accelerate the calculation of CNN in resource and power limited platform.Firstly,we used the data quantization to convert parameters from the floating-point into fixed-point ones,which improves the hardware efficiency;Secondly,we proposed a system architecture that initiates data transaction from the FPGA side,which avoids the performance degradation caused by the processors frequent configuration.At last,we proposed an efficient processing element and data buffer for the CNN calculation,which improves the computational efficiency.In this paper,we implement all the method proposed above based on a CNN targeting at traffic sign recognition(TSR).Test result shows that the hardware implementation introduces a 0.6%accuracy loss with 49 ms recognition delay,at which a single multiplier contributes 0.081 GOPS throughput and the performance power ratio reaches 6.81 GOPS/W.Compared with other works related in recent years,it can be seen that the proposed method can provide higher performance in the case of limited resources and power.
【CateGory Index】: TN791;TP183
Download(CAJ format) Download(PDF format)
CAJViewer7.0 supports all the CNKI file formats; AdobeReader only supports the PDF format.
©2006 Tsinghua Tongfang Knowledge Network Technology Co., Ltd.(Beijing)(TTKN) All rights reserved