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《Heilongjiang Science》 2010-06
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Design and Implementation of Programmable High-Speed Clock Circuit

XIAO Jing-zhong1 and LIN Qiu-hua2 (1.Heilongjiang Experimental High School,Harbin 150001,China;2.College of Information and Communication Engineering,Harbin Engineering University,Harbin 150001,China)  
A high-performance and stable high-speed clock circuit was designed according to high-speed signal processing.A kind of programmable high-speed clock chip ADF4360-7 was adopted and CPLD realized configuration to it.The frequency output range was 350MHz—1.8GHz and output power was configurable.The high-speed clock circuit was verified to satisfy technical specification of the system.There is a good value for engineering application.
【CateGory Index】: TN911.7;TN702
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【Citations】
Chinese Journal Full-text Database 4 Hits
1 Ye Bixia;Application and Design of PLL Frequency Synthesizer IC ADF4360-0[J];Computer & Digital Engineering;2007-11
2 ;Frequency Synthesizer System Based on ADF4360-7[J];Global Electronics China;2007-02
3 LIU Han-chao (1.Shanghai Astronomical Observatory,Chinese Academy of Sciences,Shanghai 200030,China; 2.Graduate University of Chinese Academy of Sciences,Beijing 100039,China);Design of Wide Band Frequency Synthesizer Based on ADF4360-7[J];Journal of Time and Frequency;2008-01
4 SHEN Wei,WEN Bi-yang,MA Zhi-gang,WANG Cai-jun,YAN Wei-dong(School of Electronic Information,Wuhan University,Wuhan 430079,China);Design of Local Oscillator for Wideband Radar with Chip ADF4360-7[J];Modern Radar;2006-08
【Co-citations】
Chinese Journal Full-text Database 10 Hits
1 LIN Qiao-li(Southwest China Institute of Electronic Technology,Chengdu 610036,China);Miniaturization Design of Frequency Synthesizer Based on ADF4360 Series[J];Telecommunication Engineering;2008-10
2 XU Ling-fei,LIN Hao-dong(The Engineering and Technical College,Chengdu University of Technology,Leshan 614007,China);Design and Implementation of Wireless Data Transmission Platform Based on DSP[J];Telecommunication Engineering;2010-10
3 Jiang Liubing1,Li Xin1,Zhang Chao2,Luo Jianbao1(1.College of Information and Communication Guilin University of Electronic Technology,Guilin 541004,China; 2.College of Electronic Engineering,Guangxi Normal University,Guilin 541004,China);Design and implementation of linear frequency sweep ground penetrating radar signal source based on DDS+PLL[J];Application of Electronic Technique;2012-02
4 YIN Xi-mei1,CHENG Hong-tao2(1.Ammunition Engineering Teaching and Research Section,Artillery College,Hefei 230031,China; 2.Information Ammunition Institute Artillery College,Hefei 230031,China);Design and implementation of one type of power and frequency controlled video transmitter[J];Electronic Design Engineering;2011-11
5 ZHANG Rui(Wuxi Institute of Commerce,Wuxi,Jiangsu,China 214153);Design of intermediate frequency digital receiver based on FPGA[J];Journal of Changsha Telecommunications and Technology Vocational College;2012-03
6 WU Chunli LV Fengchao(College of Information Science and Engineering,Northeastern University,Shenyang 110819);Generator of GSM Test Clock Based on ADF4360-9[J];Computer & Digital Engineering;2012-05
7 HUANG Zhi-wang, LUO Shou-feng(Nanjing Research Institute of Electronics Technology, Nanjing 210013, China);A Broadband Frequency Synthesizer with Integrated PLL[J];Journal of China Academy of Electronics and Information Technology;2007-04
8 Zhao Dong-mei Jiang Mao-ren Wang Wei-ting (Department of Electronic Engineering, Qingdao Branch of NAEI, Qingdao, Shandong, 266041);Application of AD9854 in a compass test signal generator[J];Science & Technology Information;2007-17
9 Jin Yongchen,Kang Huaiqi(University of Electronic Science and Technology of China,Chengdu 611731);Design and Realization of FPGA-based High-speed Sampling Platform[J];Fire Control Radar Technology;2012-02
10 Zhang Shuai,Shen Han-ning,Lin He-yun (Guilin University of Electronic Technology,Guilin Guangxi 541004,China);Design of Frequency Synthesizer Based on DDS+PLL[J];Shanxi Electronic Technology;2011-03
【Secondary Citations】
Chinese Journal Full-text Database 1 Hits
1 JIANG Mei, LIU Sanqing, LI Naiping, CHEN Zhao (Laboratory of ASIC Design, Dept Elec Sci & Technol, Huazhong Univ Sci & Technol, Wuhan, Hubei 430074, P R China);A Passive Filter for Charge Pump Phase-Locked Loop[J];Microelectronics;2003-04
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