Automatic method and implementation for nested loops in ASIC design
CHEN Muyi, LI Hui (Shenzhen Graduate School, Peking Univ., Shenzhen Guangdong 518055, China)
The automatic design method for nested loops in ASIC design is described. The basic theory of the loop accelerator is presented. The backend design of the system, key technologies such as function unit allocation, module scheduling based on hardware cost, register file designing and data path generation are detailed. And the implementation of the function modules, main data structures and interfaces between modules are concretely given. The technology can provide reference for the design and building of high-performance hardware accelerator system.