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《Microelectronics》 2008-01
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Non-Selective SiGe Pattern Epitaxy by MBE

HAN Chun1,LI Jing-chun1,TAN Kai-zhou2,3,ZHANG Jing2,3(1.School of Microelec.and Sol.Sta.Electro.,Univ.of Elec.Sci.and Technol.of China,Chengdu 610054,P.R.China;2.National Laboratory of Analog IC's,Chongqing 400060;3.Sichuan Institute of Solid-State Circuits,CETC,Chongqing 400060,P.R.China)  
To handle thermal budget in SiGe BiCMOS process,a non-selective pattern epitaxy technology has been developed.SEM,AFM,XRD and dislocation density measurements were performed,which showed that the SiGe film's RMS roughness is 0.45 nm,and dislocation density is from 0.3×103 cm-2 to 1.2×103 cm-2.No dislocation accumulation exists on the boundary of the windows,which indicates the high quality of the SiGe film.The experiment results show that the technology meets the requirements of device fabrication by SiGe BiCMOS process.
【Fund】: 模拟集成电路国家级重点实验室基金资助项目(51439010204DZ0219)
【CateGory Index】: TN304.054
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Chinese Journal Full-text Database 1 Hits
1 Wu Guibin,Ye Zhizhen,Liu Guojun,Zhao Binghui,and Cui Jifeng (State Key Laboratory of Silicon Materials,Zhejiang University,Hangzhou 310027,China);UHV/CVD Grown Strain Relaxed SiGe Buffer Layers for Strained Silicon[J];Chinese Journal of Semiconductors;2005-11
Chinese Journal Full-text Database 2 Hits
1 YANG Hongdong1 LI Jingchun1 YU Qi1 ZHOU Qian1 TAN Kaizhou2 ZHANG Jing2 (1State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology,Chengdu,66 10054,CHN )(2State Key Laboratory of Analog Integrated Circuits,Chongqing,400060,CHN);Growth Technology of SiGe HBT Base Layer by Using BiCMOS Process[J];Research & Progress of SSE Solid State Electronics;2009-04
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Chinese Journal Full-text Database 2 Hits
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