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《Microelectronics》 2008-01
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Error Analysis and System Design of High-Accuracy Pipelined A/D Converters

CHEN Ting-qian,XU Jun,ZHU Kai,ZHOU Li-ren,REN Jun-yan(State Key Laboratory of ASIC & System,Fudan University,Shanghai 201203,P.R.China)  
Main errors that affect the performance of high-accuracy pipelined A/D converter were analyzed in detail,and the analysis in mathematical expressions was presented.The main error sources are from noise of circuit blocks,constant residue gain error,variant residue gain error and incomplete settling error of amplifiers.Based on the error analysis,methods to determine system design specifications,such as values and scaling factors of sampling capacitors in blocks,and the requirement of gain,bandwidth and slew-rate of amplifiers,were analyzed.
【Fund】: 国家自然科学基金资助项目(90407003)
【CateGory Index】: TN792
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