Full-Text Search:
Home|Journal Papers|About CNKI|User Service|FAQ|Contact Us|中文
《Microelectronics》 2009-01
Add to Favorite Get Latest Update

Design of Low Jitter Voltage Controlled Oscillator in Phase Locked Loop

LIANG Yan,WU Jin(Institute of Integrated Circuit,Southeast University,Nanjing 210096,P.R.China)  
The PLL system noise and phase noise of the VCO were investigated.Based on the investigation,a low phase noise VCO containing a 2-stage differential ring oscillator was designed using CSMC's 0.5 μm CMOS process.Results from Spectre RF simulation showed that the VCO had a frequency range from 524 MHz to 1.1 GHz,a peak gain,KVCO,of-636.7 MHz/V,a VCO phase noise of-116.2 dBc/Hz at 1 MHz offset for 900 MHz oscillating frequency,and a power consumption of 21.2 mW.And system simulation showed that the VCO phase noise contribute to PLL jitter by less than 1 ps.
【CateGory Index】: TN752
Download(CAJ format) Download(PDF format)
CAJViewer7.0 supports all the CNKI file formats; AdobeReader only supports the PDF format.
【References】
Chinese Journal Full-text Database 1 Hits
1 CAI Zhimin1,2,CHEN Yingmei1,LI Zhiqun1,ZHANG Li1,LI Wei1 (1.Institute of RF-& OE-ICs,Southeast University,Nanjing,Jiangsu 210096,P.R.China;2.Information and Electronics Engineering Institute,East China Institute of Technology,Fuzhou,Jiangxi 344000,P.R.China);A Low Power Voltage Controlled Oscillator for RF Receiver in GPS[J];Microelectronics;2009-06
【Citations】
Chinese Journal Full-text Database 1 Hits
1 CHEN Dan-feng,LU Ping,LI Lian,REN Jun-yan (ASIC & System State Key Laboratory,Fudan University,Shanghai 201203,P.R.China);A Low-Jitter Clock Generator for HDTV[J];Microelectronics;2007-01
【Co-references】
Chinese Journal Full-text Database 1 Hits
1 Wang Xueyan,Zhu En,Xiong Mingzhen,and Wang Zhigong(Institute of RF- & OE-ICs,Southeast University,Nanjing 210096,China);Design of 11GHz CMOS Ring VCO[J];Chinese Journal of Semiconductors;2005-01
©2006 Tsinghua Tongfang Knowledge Network Technology Co., Ltd.(Beijing)(TTKN) All rights reserved