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《Microelectronics》 2009-01
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Implementation of FFT Processor Based on Dynamic Partial Reconfiguration

PAN Wei,LIU Huan,LI Guangjun(School of Communication and Information Engineering,Univ.of Electronic Science and Technology of China,Chengdu 610054,P.R.China)  
A novel reconfigurable FFT architecture based on dynamic partial reconfiguration(DPR) was proposed.Compared with conventional FFT,the design is greatly improved in reconfigurable time.Meanwhile,reconfigurable units can be dynamically added to or removed from the processor.The reconfigurable parts features small size due to the use of the novel FFT control arithmetic.Simulation on Xilinx Virtex2p FPGA showed that the architecture has higher computing efficiency than Xilinx IPcore and exclusive characteristics of dynamic reconfiguration.
【Fund】: 国家自然科学基金资助项目(60676014)
【CateGory Index】: TP332
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Chinese Journal Full-text Database 1 Hits
1 YIN Lei,LI Guang-jun(Inst.of Commun.and Infor.Engineer.,Univ.of Elec.Sci.and Technol.of China,Chengdu 610054,P.R.China);Design and Implementation of Reconfigurable Viterbi Fabric[J];Microelectronics;2007-05
【Secondary Citations】
Chinese Journal Full-text Database 1 Hits
1 LI Bing(Southeast University Electronics Department,Wuxi Branch of Southeast University,Nanjing,210096,CHN)WU Jin WEI Tongli(Microelectronics Center of Southeast University,Nanjing,210096,CHN);Implement Methodology of Core-based Dynamic Reconfigurable FPGA[J];Research & Progress of Solid State Electronics;2003-01
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