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《Microelectronics》 2009-01
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Structure Description Method for Hierarchical FPGA Based on VPR

LIU Pan1,2,ZHOU Qiang1,ZHU Ke1,QIAN Xu2,ZHANG Zheng2(1.Dept.of Computer Science & Technology,Tsinghua University,Beijing 100084,P.R.China;2.School of Mechanical Electronic & Information Engineering,China University of Mining and Technology,Beijing 100083,P.R.China)  
An FPGA architecture description method was proposed for hierarchical FPGA design based on VPR,which could be used to easily describe many types of hierarchical FPGA architectures.It made CAD tools integrated with routing function of VPR,which could be used to conveniently verify the design of FPGA architecture.Experiment results showed that this architecture description method had excellent flexibility and certain versatility.In addition,this method could also be used for physical design and new FPGA architecture design.
【Fund】: 国家自然科学基金资助项目(90607001)
【CateGory Index】: TN791
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【Citations】
Chinese Journal Full-text Database 2 Hits
1 DAI Yong ping 1,SUN Zhong lin 1,LU Tie jun 2,WANG Long wang 2 (1 Information College,Nankai University,Tianjin 300071,P R China; 2 Beijing Microelectronics Technology Institute,Beijing 100076,P R China);Application of EDA in the Design of New Si Based Flat Panel Display[J];Microelectronics;2002-05
2 YANG Yan, HOU Chao-huan (Graduate School; Institute of Acoustics, The Chinese Academy of Sciences, Beijing 100080, P.R.China);A Concurrent Strategy of FPGA’s Verification for System-on-Chip[J];Microelectronics;2004-04
【Co-citations】
Chinese Journal Full-text Database 1 Hits
1 DAI Yong-ping(1.Information college,Nankai University,Tianjin,300071,CHN;2.Department of Electrical and Computer Engineering University of Minnesota,Minneapolis,MN.U.S.A);Microdisplay Technology(1)[J];Optoelecfronic Technology;2005-03
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