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《Microelectronics》 2009-01
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Improved Digital Calibration Arithmetic for Pipelined A/D Converter

QIAN Liming,YAO Jiannan,WU Jin,LI Bing(Institute of Integrated Circuit,Southeast University,Nanjing 210096,P.R.China)  
Digital calibration arithmetic has found wide applications in high precision pipelined A/D converter.The structure of pipelined ADC using digital calibration is usually 1.5-bit/stage.Based on the analysis of advantages and disadvantages of different structures,a 2-bit/stage was adopted,which had superiority in power consumption and chip size,and an improved digital calibration arithmetic was designed for this structure,which solved the problem of inaccuracy of calibration coefficients in exsiting digital calibration arithmetics,making the calibrated output data more accurate.Experimental results indicated that the proposed digital calibration arithmetic could significantly improve the linearity of the system.
【CateGory Index】: TN792
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Chinese Journal Full-text Database 1 Hits
1 WANG Yuehua,NING Ning,LIU Yuan(State Key Lab.of Elec.Thin Films and Integr.Dev.,Univ.of Elec.Sci.and Technol.of China,Chengdu 610054,P.R.China);Effects of Gain Error and Capacitor Mismatch on Linearity of Pipelined ADCs[J];Microelectronics;2008-02
Chinese Journal Full-text Database 2 Hits
1 MA Shuang,XU Xin (National University of Defense Technology,Changsha,410073,China);Application of High Speed A/D Converter ADC08D1000 Baesd on FPGA[J];Modern Electronics Technique;2009-14
2 HE Wei(School of Electronics Engineering,Xi'an University of Posts and Telecommunications,Xi'an 710121,China);Design of A/D Converter for Low Power 10 b 100MHz Pipeline[J];Modern Electronics Technique;2010-18
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