Full-Text Search:
Home|Journal Papers|About CNKI|User Service|FAQ|Contact Us|中文
《Microelectronics》 2016-01
Add to Favorite Get Latest Update

An Efficient Architecture of Reverse Converter for Arbitrary Moduli Set

YANG Peng;LI Lei;Research Institute of Elec.Sci.and Technol.,Univ.of Electronic Science and Technology of China;  
The conversion from residue to the binary number which is often called reverse conversion,is critical and difficult for the practicality of residue number system(RNS).By simplifying the Chinese remainder theorem(CRT)and avoiding modulo M,an efficient architecture of reverse converter for the arbitrary moduli set was proposed.Its code design was accomplished in Verilog HDL.VCS and Verdi were employed to complete the simulation and verification.Finally,Design Compiler with SMIC 0.13μm technology was used to synthesize the RTL codes and generate the reports of area and delay as well.Compared with the CRT-based architecture and the MRC-based architecture,the synthesized results indicated that the proposed architecture could achieve an average complexity of "area×delay"savings of 23.3% and 26.4% respectively,and the conversion performance was improved significantly.
【Fund】: 航空科学基金资助项目(20110580002);; 中央高校基础研究基金资助项目(ZYGX2009J092)
【CateGory Index】: TP301
Download(CAJ format) Download(PDF format)
CAJViewer7.0 supports all the CNKI file formats; AdobeReader only supports the PDF format.
©2006 Tsinghua Tongfang Knowledge Network Technology Co., Ltd.(Beijing)(TTKN) All rights reserved