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《Microelectronics》 2016-01
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Analysis of Complete Response for Weighted Capacitor DAC

LIU Jia;L Caixia;LI Zheying;NIU Wenliang;Beijing Key Laboratory of Information Service Engineering;School of Computer Science and Engineering,Beihang University;Information Collage,Beijing Union University;Application Technology Collage,Beijing Union University;  
Considering the gate on resistor of MOS transistor as a switch,the analysis of complex frequency domain(Laplace domain)was done to the weighted capacitor DAC(WCDAC).The analysis results showed that there was only zero-state response(ZSR)and no zero-input response(ZIR)in the output signal of WCDAC.In analysis,each weighted capacitor-MOS transistor was an independent branch.The sequence of binary digital signal was the input control signal of WCDAC,and each input digital signal was corresponding to an analog voltage which was the output of WCDAC.In addition,each digital signal could be kept for a time enough to make WCDAC get into stable state.Following such an idea,the complete response model of WCDAC in Laplace domain had been built.The model showed that there was no ZIR if and only if the time to hold digital signal was long enough.The result meant that it was no necessary to consider the influence of ZIR during analyzing the parameters and performances of WCDAC.
【Fund】: 北京高等学校青年英才计划项目(YETP1773;YETP1754);; 北京市信息服务工程重点实验室开放课题资助项目
【CateGory Index】: TN792
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