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《Journal of Zhejiang University(Engineering Science)》 2007-09
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Scheme to optimize real-time bus scheduling in multiprocessor SoC for media processing

CHEN Ke-ming1,2,LIU Peng2,WANG Wei-dong2,YAO Qing-dong2(1.Microelectronic CAD Center,Hangzhou Dianzi University,Hangzhou 310018,China;2.Department of Information Science and Electronic Engineering,Zhejiang University,Hangzhou 310027,China)  
From the view of reducing bus task conflict,an optimization scheme was proposed to reduce the processor performance loss in the bus scheduling of multiprocessor system on chip(SoC) for media processing.This scheme combines bus task property modification with bus task priority adjustment to schedule different bus tasks.With the guarantee of real-time requirement,through extending the allowed execution time window for some specific bus tasks,the original task was partitioned into several subtasks and their priorities were dynamically adjusted.So most subtasks were performed in the idle state of bus and the conflicts among bus tasks were reduced.The proposed scheme was adopted into the design of multiprocessor SoC,MediaSoC3221A.The performance loss was reduced from 4.7% to 0.1% during real-time motion picture experts group(MPEG) decoding.
【Fund】: 国家“863”高技术研究发展计划资助项目(2002AA1Z1140);; 霍英东基金资助项目(94031)
【CateGory Index】: TP332
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【References】
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1 Li De-xian Peng Jian-ying Yan Xiao-lang(Institute of VLSI Design,Zhejiang University,Hangzhou 310027,China);An Optimized Bus Scheduling Scheme Based on Specific Application[J];Journal of Electronics & Information Technology;2009-05
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【Citations】
Chinese Journal Full-text Database 1 Hits
1 LI Dong-xiao, YAO Qing-dong, LIU Peng, ZHOU Li ( Dept. of Information Science & Electronic Engineering, Zhejiang Univ., Hangzhou 310027, China );Bus Design for HDTV SoC Decoder[J];Journal of Circuits and Systems;2003-03
【Co-citations】
Chinese Journal Full-text Database 10 Hits
1 WU Xu-fan,LING Ming,YANG Jun(National ASIC System Engineering Technology Research Center,Southeast University,Nanjing 210096,China);Bus buffer model and simulation in embedded microprocessor[J];Journal of Circuits and Systems;2006-05
2 JIANG Zhi-di,LI Dong-xiao,ZHENG Wei,WANG Wei-dong,YAO Qing-dong(Dept.of Information Science& E1ectronic Engineering,Zhejiang Univ.,Hangzhou 310027,China);A bus schedule of Multimedia System-On-Chip (M-SoC)[J];Journal of Circuits and Systems;2007-01
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9 ZHOU Jian,LIU Peng,MEI You-liang,CHEN Ke-ming (Department of Information Science and Electronic Engineering,Zhejiang University,Hangzhou 310027,China);Hardware/software co-optimization of AAC decoder based on embedded microprocessor core[J];Journal of Zhejiang University(Engineering Science);2007-08
10 LIU Peng1,ZHONG Geng1,XU Guo-zhu1,2,WU Ke-jun1 ( 1. Department of Information Science and Electronic Engineering,Zhejiang University,Hangzhou 310027,China; 2. Hangzhou Silan Microelectronics CO.,LTD,Hangzhou 310012,China );On-chip debug design based on debug exception model for embedded processor[J];Journal of Zhejiang University(Engineering Science);2010-06
【Co-references】
Chinese Journal Full-text Database 10 Hits
1 TANG Peng, YANG Yin-tang (Institute of Microelectronics , Xidian University , xi'an 710071, China);A design of 8-bit low power MCU embedded core[J];Semiconductor Technology;2002-02
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【Secondary Citations】
Chinese Journal Full-text Database 2 Hits
1 WANG Hui, YU Lu, MAO Xun, WANG Wei, GONG Hui-min, YAO Qing-dong (Dept. of Information Science & Electronics Engineering ZJU, Hangzhou 310027, China);A Decentralized Control Scheme of Dedicated MPEG2 Video VLSI Decoder[J];Journal of Circuits and Systems;2002-01
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