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VDVAS: An Integrated Virtual Design and Virtual Assembly Environment

WAN Hua gen, GAO Shu ming, PENG Qun sheng (State Key Lab of CAD&CG, Zhejiang University, Hangzhou 310027)  
Virtual reality is now becoming matured for serious engineering applications. This paper describes VDVAS, an integrated multi modal virtual design and virtual assembly environment, within which the designers are enabled to create both the solid model of a part and the assembly model of a product in 3D space by direct 3D manipulations and voice commands intuitively and easily, to perform assembly planning interactively in 3D space, and to simulate and check assembly process. One important feature of VDVAS lies in that it allows designers to modify components of an assembly(if any design flaw is found) during in the process of assembly modeling and simulation without the need of time consuming data exchange between virtual environment and other CAD applications. This is, of course, achieved by integrating virtual assembly with virtual design. Experiments show that designers can perform assembly planning and verification in VDVAS as if they were, to some extent, in the real physical world.
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