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Journal of Shanghai Jiaotong University
FQ: 月刊
AD of Publication: 上海市
Lanuage: 中文;
ISSN: 1006-2467
CN: 31-1466/U
YP: 1956
Url: 上海交通大学
Recommended Journals
Journal of Shanghai Jiaotong University
2013 -01
Catalog
Parallel Processing Mapping Strategy of Spatial Analysis under the Heterogeneous Environment ZHANG Jian-bo,ZHOU Si-bo,YUAN Guo-bin,SHI Yang,ZHU Jian-bo(Faculty of Information Engineering,China University of Geosciences,Wuhan 430074,China)
Soft Error Problem and Countermeasure in Nanometer Scale Integrated Circuits ZHANG Min-xuan,SUN Yan,SONG Chao(College of Computer,National University of Defense Technology,Changsha 410073,China)
Finite Target Oriented Collisionless Radio Frequency Identification Technology LI Xiao-fang,ZHANG Min-xuan,XU Wei-xia(College of Computer,National University of Defense Technology,Changsha 410073,China)
Novel Structure of Buffer: Support Deadlock-Free Fully-Adaptive Routing XIAO Can-wen,ZHANG Min-xuan(College of Computer,National University of Defense Technology,Changsha 410073,China)
A Fault-Tolerant and Deadlock-Free Routing Algorithm in 2D-Mesh for Network on Chip ZHOU Lei1,2,WU Ning1,LI Yun2(1.College of Electronic and Information Technology,Nanjing University of Aeronautics and Astronautic,Nanjing 210016,China;2.College of Information Engineering,Yangzhou University,Yangzhou 225009,Jiangsu,China)
Design and Realization of Wireless Clock Distribution Transmitter Based on Folded Antennas Integrated on Silicon Substrate LI Jin-wen,HE Xiao-wei,ZHANG Min-xuan(College of Computer,National University of Defense Technology,Changsha 410073,China)
Design of a Reconfigurable Parallel Nonlinear Feedback Shift Register Structure Targeted at Stream Cipher CHEN Tao1,YANG Xuan2,DAI Zi-bin1,LI Wei1,CHEN Xun1(1.PLA Information Engineering University,Zhengzhou 450004,China; 2.Jiangnan Institute of Technology,Wuxi 214083,Jiangsu,China)
Effect of Device Size on Pulse Quenching in a 65 nm Bulk CMOS Process LI Peng,ZHAO Zhen-yu,ZHENG Chao,ZHANG Min-xuan(College of Computer,National University of Defense Technology,Changsha 410073,China)
Reliability-Aware Link Management Strategy for Network on Chip JIAO Jia-jia,FU Yu-zhuo(School of Microelectronics,Shanghai Jiaotong University,Shanghai 200240,China)
Design of System Level Simulation Platform for Dynamic Reconfigurable Many-Core Processor HAN Xing,JIANG Jiang,FU Yu-zhuo,ZHOU Chuan,LIU Zi-yang,YANG Kai-kai(School of Microelectronics,Shanghai Jiaotong University,Shanghai 200240,China)
An Adaptive Token Protocol Optimized for Migratory Sharing FU Gui-tao1,2,ZHAO Tian-lei1,TANG Chuan1,XING Zuo-cheng1(1.College of Computer,National University of Defense Technology,Changsha 410073,China; 2.Beijing Satellite Navigation Center,Beijing 100094,China)
Design for Silicon Debug of Integrated Circuit by Reusing Test Logic ZHANG Ming,GAO Jun,ZHANG Min-xuan(College of Computer,National University of Defense Technology,Changsha 410073,China)
Reliability-Aware Optimization for Task Mapping in Network-on-Chip LIU Ting,WU Yao-yi,FU Yu-zhuo(School of Microelectronics,Shanghai Jiaotong University,Shanghai 200240,China)
A 3D Stacking Technology Based Reliable Cache Architecture SUN Yan,SONG Chao,LI Tie-jun,ZHANG Min-xuan(College of Computer,National University of Defense Technology,Changsha 410073,China)
Automatic Word-Length Determination Tool Based on Simulated Annealing Algorithm LI Yuan1,JIANG Jiang2,ZHANG Min-xuan1,WEI Shao-jun3(1.College of Computer,National University of Defense Technology,Changsha 410073,China; 2.School of Microelectronics,Shanghai Jiaotong University,Shanghai 200240,China; 3.Institute of Microelectronics,Tsinghua University,Beijing 100084,China)
Data Driven Multi-core Processor BI Zhuoa,XU Yun-chuanb,WANG Zhenb(a.School of Mechatronic Engineering and Automation;b.Microelectronics R&D Center, Shanghai University,Shanghai 200072,China)
A Novel Networks-on-Chip Topology for Three Dimensional Microprocessor WANG Di1,BAI Han2,ZHAO Tian-lei1,TANG Yu-xing1,DOU Qiang1(1.College of Computer,National University of Defense Technology,Changsha 410073,China; 2.Jiangsu Unit,Chinese People's Armed Police Force,Nanjing 210036,China)
Deadlock Detection and Recovery Based on Topological Order for NoC QIAO Yu-ran,WU Nan,YANG Qian-ming,WEN Mei,ZHANG Chun-yuan(College of Computer,National University of Defense Technology,Changsha 410073,China)
Parallel On-line Testing for Digital Microfluidic Biochip ZHANG Ling1,2,KUANG Ji-shun2,LIN Jing3,MEI Jun-jin1(1.School of Computer,Hubei Polytechnic University,Huangshi 435003,Hubei,China; 2.School of Computer and Communication,Hunan University,Changsha 410082,China; 3.School of Medicine,Hubei Polytechnic Univeristy,Huangshi 435003,Hubei,China)
A Cache Dynamic Power Analysis Tool in Full-System Simics HUANG Zhi-bin,ZHU Ming-fa,XIAO Li-min(State Key Laboratory of Software Development Environment,School of Computer Science and Engineering,Beihang University,Beijing 100191,China)
Design of a 2 GHz L2 Cache for 16-core Processor LI Yong-jin,DENG Rang-yu,YAN Xiao-bo,YI Xiao-fei,ZHOU Hong-wei,ZHANG Ying(College of Computer,National University of Defense Technology,Changsha 410073,China)
Realization and Design of a Hybrid Storage System in High Performance Computing SONG Zhen-long,LI Qiong,XU Wei-xia,LI Jin-wen,LIU Guang-ming(College of Computer,National University of Defense Technology,Changsha 410073,China)
Low Power Design of a Multi-Core Processor Chip GAO Jun,WANG Yong-wen,GUO Wei,HUANG An-wen(College of Computer,National University of Defense Technology,Changsha 410073,China)
A Synthesizable Pseudo-Random Functional Verification Method for Cache ZHANG Jian-min,ZHANG Jun,XIA Jun,PANG Zheng-bin,XU Wei-xia(College of Computer,National University of Defense Technology,Changsha 410073,China)
Dither Circuit to Improve Performance for a Radiation Hardening by Design Pipeline Analog to Digital Converter YU Jin-shan1,2,LIANG Sheng-ming2,MA Zhuo1,WANG Yu-xin2 ZHANG Rui-tao2,LIU Tao2,LI Ting2,YU Zhou2(1.College of Computer,National University of Defense Technology,Changsha 410073,China; 2.No.24 Research Institute of China Electronic Technology Group Corporation,Laboratory of Analog Integrated Circuit,Chongqing 400060,China)
Code Isolation Based Iterative Compilation Optimization for Large Programs LU Ping-jing,LI Bao,CHE Yong-gang,PANG Zheng-bin(College of Computer,National University of Defense Technology,Changsha 410073,China)
High Radix Router Design Based on Asymmetric Crossbar FANG Ming1,CHEN Song-qiao1,WANG Ke-fei2(1.School of Information Science and Engineering,Central South University,Changsha 410083,China; 2.College of Computer,National University of Defence Technology,Changsha 410073,China)
A Flit-Switch Bufferless Router Based on Encoding Allocation SHEN Jian-liang,QI Shu-bo,LI Jin-wen,LIU Lei,LI Si-kun(College of Computer,National University of Defense Technology,Changsha 410073,China)
Master-Equation Simulation of Double-Island Single-Electron Transistor Based on Periodical Characteristics SUI Bing-cai,GAO Jun,CHEN Xiao-bao,ZHANG Chao,FANG Liang(College of Computer,National University of Defense Technology,Changsha 410073,China)
High-Effect Priority Bounded Confidence Model for Network Opinion Evolution CHEN Gui-rong1,2,CAI Wan-dong1,XU Hui-jie1 YAN Pei-xiang3,WANG Jian-ping1(1.School of Computer Science,Northwestern Polytechnical University,Xi'an 710072,China; 2.School of Information and Navigation,Air Force Engineering University,Xi'an 710077,China; 3.Nanjing Military Region 73658 Forces,Nanjing 210016,China)
TCAM and Multi-core Network Processor Cooperative IP Lookup Acceleration Model SHI Wei,LU Ze-xin,SUN Zhi-gang(College of Computer,National University of Defense Technology,Changsha 410073,China)
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