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Designed 65-kb BiCMOS SRAM using 0.8μm process technology

DONG Su-ling ,CHENG Li, WANG Zhen-yu, GAO Ping(Institute of Electricity & Information, Jiangsu University, Zhenjiang, 212013, China)  
A new 65-kb static random access memory cell and its peripheral circuits are designed,and some main ideas of fabricating for the designed BiCMOS SRAM using 0.8mm process andtechnology are also proposed in this paper. HSpice simulation result shows that the designed BiCMOSSRAM will be operated down to sub-3V, not only to confirm the low power dissipation and highintegrity of CMOS SRAM, but also to obtain the advantages of high-speed and large driving ability,therefore, this BiCMOS SRAM is very suitable for cache static random access memory(CSRAM) andother portable digital equipments.
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